no code implementations • 6 May 2024 • HaoYu Yang, Haoxing Ren
Lithography, transferring chip design masks to the silicon wafer, is the most important phase in modern semiconductor manufacturing flow.
no code implementations • 12 Apr 2024 • Amit Sharma, Teodor-Dumitru Ene, Kishor Kunal, Mingjie Liu, Zafar Hasan, Haoxing Ren
This paper presents a comparative analysis of total cost of ownership (TCO) and performance between domain-adapted large language models (LLM) and state-of-the-art (SoTA) LLMs , with a particular emphasis on tasks related to coding assistance for chip design.
no code implementations • 8 Feb 2024 • HaoYu Yang, Anthony Agnesina, Haoxing Ren
Exploding predictive AI has enabled fast yet effective evaluation and decision-making in modern chip physical design flows.
no code implementations • 19 Jan 2024 • Yingjie Li, Anthony Agnesina, Yanqing Zhang, Haoxing Ren, Cunxi Yu
Boolean algebraic manipulation is at the core of logic synthesis in Electronic Design Automation (EDA) design flow.
no code implementations • 31 Oct 2023 • Mingjie Liu, Teodor-Dumitru Ene, Robert Kirby, Chris Cheng, Nathaniel Pinckney, Rongjian Liang, Jonah Alben, Himyanshu Anand, Sanmitra Banerjee, Ismet Bayraktaroglu, Bonita Bhaskaran, Bryan Catanzaro, Arjun Chaudhuri, Sharon Clay, Bill Dally, Laura Dang, Parikshit Deshpande, Siddhanth Dhodhi, Sameer Halepete, Eric Hill, Jiashang Hu, Sumit Jain, Ankit Jindal, Brucek Khailany, George Kokai, Kishor Kunal, Xiaowei Li, Charley Lind, Hao liu, Stuart Oberman, Sujeet Omar, Ghasem Pasandi, Sreedhar Pratty, Jonathan Raiman, Ambar Sarkar, Zhengjiang Shao, Hanfei Sun, Pratik P Suthar, Varun Tej, Walker Turner, Kaizhe Xu, Haoxing Ren
ChipNeMo aims to explore the applications of large language models (LLMs) for industrial chip design.
1 code implementation • 14 Sep 2023 • Mingjie Liu, Nathaniel Pinckney, Brucek Khailany, Haoxing Ren
The increasing popularity of large language models (LLMs) has paved the way for their application in diverse domains.
no code implementations • 27 Oct 2022 • Mingjie Liu, HaoYu Yang, Zongyi Li, Kumara Sastry, Saumyadip Mukhopadhyay, Selim Dogru, Anima Anandkumar, David Z. Pan, Brucek Khailany, Haoxing Ren
These synthetic mask images will augment the original limited training dataset used to finetune the lithography model for improved performance.
no code implementations • 7 Sep 2022 • Keren Zhu, Hao Chen, Walker J. Turner, George F. Kokai, Po-Hsuan Wei, David Z. Pan, Haoxing Ren
Analog and mixed-signal (AMS) circuit designs still rely on human design expertise.
no code implementations • 8 Jul 2022 • HaoYu Yang, Zongyi Li, Kumara Sastry, Saumyadip Mukhopadhyay, Anima Anandkumar, Brucek Khailany, Vivek Singh, Haoxing Ren
Machine learning techniques have been extensively studied for mask optimization problems, aiming at better mask printability, shorter turnaround time, better mask manufacturability, and so on.
no code implementations • 12 Mar 2022 • HaoYu Yang, Zongyi Li, Kumara Sastry, Saumyadip Mukhopadhyay, Mark Kilgard, Anima Anandkumar, Brucek Khailany, Vivek Singh, Haoxing Ren
Lithography simulation is a critical step in VLSI design and optimization for manufacturability.
no code implementations • 11 Mar 2022 • Yanqing Zhang, Haoxing Ren, Akshay Sridharan, Brucek Khailany
In this paper, we present GATSPI, a novel GPU accelerated logic gate simulator that enables ultra-fast power estimation for industry sized ASIC designs with millions of gates.
no code implementations • 9 Jul 2021 • Haoxing Ren, Matthew Fojtik, Brucek Khailany
High quality standard cell layout automation in advanced technology nodes is still challenging in the industry today because of complex design rules.
no code implementations • 8 Feb 2021 • Steve Dai, Rangharajan Venkatesan, Haoxing Ren, Brian Zimmer, William J. Dally, Brucek Khailany
4-bit weights and 8-bit activations achieve near-full-precision accuracy for both BERT-base and BERT-large on SQuAD while reducing area by 26% compared to an 8-bit baseline.
no code implementations • 26 Nov 2020 • Zhiyao Xie, Haoxing Ren, Brucek Khailany, Ye Sheng, Santosh Santosh, Jiang Hu, Yiran Chen
Moreover, the proposed CNN model is general and transferable to different designs.
no code implementations • 26 Nov 2020 • Zhiyao Xie, Guan-Qi Fang, Yu-Hung Huang, Haoxing Ren, Yanqing Zhang, Brucek Khailany, Shao-Yun Fang, Jiang Hu, Yiran Chen, Erick Carvajal Barboza
Experimental results on benchmark circuits show that our approach achieves 25% improvement in design quality or 37% reduction in sampling cost compared to random forest method, which is the kernel of a highly cited previous work.