Search Results for author: Utkarsh Saxena

Found 3 papers, 0 papers with code

Hardware/Software co-design with ADC-Less In-memory Computing Hardware for Spiking Neural Networks

no code implementations3 Nov 2022 Marco Paul E. Apolinario, Adarsh Kumar Kosta, Utkarsh Saxena, Kaushik Roy

Spiking Neural Networks (SNNs) are bio-plausible models that hold great potential for realizing energy-efficient implementations of sequential tasks on resource-constrained edge devices.

Image Classification Optical Flow Estimation

On-chip learning in a conventional silicon MOSFET based Analog Hardware Neural Network

no code implementations1 Jul 2019 Nilabjo Dey, Janak Sharda, Utkarsh Saxena, Divya Kaushik, Utkarsh Singh, Debanjan Bhowmik

On-chip learning in a crossbar array based analog hardware Neural Network (NN) has been shown to have major advantages in terms of speed and energy compared to training NN on a traditional computer.

On-chip learning for domain wall synapse based Fully Connected Neural Network

no code implementations25 Nov 2018 Apoorv Dankar, Anand Verma, Utkarsh Saxena, Divya Kaushik, Shouri Chatterjee, Debanjan Bhowmik

Spintronic devices are considered as promising candidates in implementing neuromorphic systems or hardware neural networks, which are expected to perform better than other existing computing systems for certain data classification and regression tasks.

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