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Found 5 papers, 1 papers with code
Supervised Learning Using a Dressed Quantum Network with "Super Compressed Encoding": Algorithm and Quantum-Hardware-Based Implementation
Implementation of variational Quantum Machine Learning (QML) algorithms on Noisy Intermediate-Scale Quantum (NISQ) devices is known to have issues related to the high number of qubits needed and the noise associated with multi-qubit gates.
Comparing domain wall synapse with other Non Volatile Memory devices for on-chip learning in Analog Hardware Neural Network
We next incorporate the DW synapse as a Verilog-A model in the crossbar array based NN circuit we design on SPICE circuit simulator.
Supervised learning with a quantum classifier using a multi-level system
We demonstrate successful classification of popular benchmark datasets with our quantum classifier and compare its performance with respect to some classical machine learning classifiers.
Quantum Physics
On-chip learning in a conventional silicon MOSFET based Analog Hardware Neural Network
On-chip learning in a crossbar array based analog hardware Neural Network (NN) has been shown to have major advantages in terms of speed and energy compared to training NN on a traditional computer.
On-chip learning for domain wall synapse based Fully Connected Neural Network
Spintronic devices are considered as promising candidates in implementing neuromorphic systems or hardware neural networks, which are expected to perform better than other existing computing systems for certain data classification and regression tasks.
