no code implementations • 10 Jun 2023 • Adithya Krishna, Srikanth Rohit Nudurupati, Chandana D G, Pritesh Dwivedi, André van Schaik, Mahesh Mehendale, Chetan Singh Thakur
In this paper, we present RAMAN, a Re-configurable and spArse tinyML Accelerator for infereNce on edge, architected to exploit the sparsity to reduce area (storage), power as well as latency.
no code implementations • ECCV 2020 • Hassan Dbouk, Hetul Sanghvi, Mahesh Mehendale, Naresh Shanbhag
While various complexity reduction techniques, such as lightweight network architecture design and parameter quantization, have been successful in reducing the cost of implementing these networks, these methods have often been considered orthogonal.