Search Results for author:
Found 7 papers, 3 papers with code
Analog In-Memory Computing with Uncertainty Quantification for Efficient Edge-based Medical Imaging Segmentation
This work investigates the role of the emerging Analog In-memory computing (AIMC) paradigm in enabling Medical AI analysis and improving the certainty of these models at the edge.
Grassroots Operator Search for Model Edge Adaptation
The mathematical instructions are then used as the basis for searching and selecting efficient replacement operators that maintain the accuracy of the original model while reducing computational complexity.
Hardware Aware Neural Architecture Search
Neural Architecture Search
Using the IBM Analog In-Memory Hardware Acceleration Kit for Neural Network Training and Inference
In this tutorial, we provide a deep dive into how such adaptations can be achieved and evaluated using the recently released IBM Analog Hardware Acceleration Kit (AIHWKit), freely available at https://github. com/IBM/aihwkit.
AnalogNAS: A Neural Network Design Framework for Accurate Inference with Analog In-Memory Computing
Digital processors based on typical von Neumann architectures are not conducive to edge AI given the large amounts of required data movement in and out of memory.
A flexible and fast PyTorch toolkit for simulating training and inference on analog crossbar arrays
We introduce the IBM Analog Hardware Acceleration Kit, a new and first of a kind open source toolkit to simulate analog crossbar arrays in a convenient fashion from within PyTorch (freely available at https://github. com/IBM/aihwkit).
A Comprehensive Survey on Hardware-Aware Neural Architecture Search
Arguably their most significant impact has been in image classification and object detection tasks where the state of the art results have been obtained.
Hardware Aware Neural Architecture Search
Image Classification
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Ultra-Low Precision 4-bit Training of Deep Neural Networks
In this paper, we propose a number of novel techniques and numerical representation formats that enable, for the very first time, the precision of training systems to be aggressively scaled from 8-bits to 4-bits.
