Search Results for author: Jose L. Abellan

Found 2 papers, 1 papers with code

NeuraChip: Accelerating GNN Computations with a Hash-based Decoupled Spatial Accelerator

1 code implementation23 Apr 2024 Kaustubh Shivdikar, Nicolas Bohm Agostini, Malith Jayaweera, Gilbert Jonatan, Jose L. Abellan, Ajay Joshi, John Kim, David Kaeli

We introduce a rolling eviction strategy to mitigate data idling in on-chip memory as well as address the prevalent issue of memory bloat in sparse graph computations.

Puppeteer: A Random Forest-based Manager for Hardware Prefetchers across the Memory Hierarchy

no code implementations28 Jan 2022 Furkan Eris, Marcia S. Louis, Kubra Eris, Jose L. Abellan, Ajay Joshi

In this work, we propose Puppeteer, which is a hardware prefetcher manager that uses a suite of random forest regressors to determine at runtime which prefetcher should be ON at each level in the memory hierarchy, such that the prefetchers complement each other and we reduce the data/instruction access latency.

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