Search Results for author:
Found 6 papers, 2 papers with code
NeuraChip: Accelerating GNN Computations with a Hash-based Decoupled Spatial Accelerator
We introduce a rolling eviction strategy to mitigate data idling in on-chip memory as well as address the prevalent issue of memory bloat in sparse graph computations.
Hera: A Heterogeneity-Aware Multi-Tenant Inference Server for Personalized Recommendations
While providing low latency is a fundamental requirement in deploying recommendation services, achieving high resource utility is also crucial in cost-effectively maintaining the datacenter.
Answer Fast: Accelerating BERT on the Tensor Streaming Processor
Transformers have become a predominant machine learning workload, they are not only the de-facto standard for natural language processing tasks, but they are also being deployed in other domains such as vision and speech recognition.
Deep Learning Training in Facebook Data Centers: Design of Scale-up and Scale-out Systems
Large-scale training is important to ensure high performance and accuracy of machine-learning models.
Distributed, Parallel, and Cluster Computing 68T05, 68M10 H.3.3; I.2.6; C.2.1
NeuMMU: Architectural Support for Efficient Address Translations in Neural Processing Units
To satisfy the compute and memory demands of deep neural networks, neural processing units (NPUs) are widely being utilized for accelerating deep learning algorithms.
LYTNet: A Convolutional Neural Network for Real-Time Pedestrian Traffic Lights and Zebra Crossing Recognition for the Visually Impaired
LYTNet delivers both of the two most important pieces of information for the visually impaired to cross the road.
