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Found 55 papers, 7 papers with code
DYNAP-SE2: a scalable multi-core dynamic neuromorphic asynchronous spiking neural network processor
With the remarkable progress that technology has made, the need for processing data near the sensors at the edge has increased dramatically.
Feed-forward and recurrent inhibition for compressing and classifying high dynamic range biosignals in spiking neural network architectures
Neuromorphic processors that implement Spiking Neural Networks (SNNs) using mixed-signal analog/digital circuits represent a promising technology for closed-loop real-time processing of biosignals.
SPAIC: A sub-$μ$W/Channel, 16-Channel General-Purpose Event-Based Analog Front-End with Dual-Mode Encoders
Low-power event-based analog front-ends (AFE) are a crucial component required to build efficient end-to-end neuromorphic processing systems for edge computing.
Core interface optimization for multi-core neuromorphic processors
In particular the core interface that manages inter-core spike communication is a crucial component as it represents the bottleneck of Power-Performance-Area (PPA) especially for the arbitration architecture and the routing memory.
Scaling Limits of Memristor-Based Routers for Asynchronous Neuromorphic Systems
Multi-core neuromorphic systems typically use on-chip routers to transmit spikes among cores.
Neuromorphic analog circuits for robust on-chip always-on learning in spiking neural networks
We designed a spiking neural network with these learning circuits in a prototype chip using a 180 nm CMOS technology.
NeuroBench: A Framework for Benchmarking Neuromorphic Computing Algorithms and Systems
The NeuroBench framework introduces a common set of tools and systematic methodology for inclusive benchmark measurement, delivering an objective reference framework for quantifying neuromorphic approaches in both hardware-independent (algorithm track) and hardware-dependent (system track) settings.
Long-term stable Electromyography classification using Canonical Correlation Analysis
Here we propose a novel statistical method based on canonical correlation analysis (CCA) that stabilizes EMG classification performance across multiple days for long-term control of prosthetic devices.
FPGA Implementation of An Event-driven Saliency-based Selective Attention Model
Artificial vision systems of autonomous agents face very difficult challenges, as their vision sensors are required to transmit vast amounts of information to the processing stages, and to process it in real-time.
An Adaptive Event-based Data Converter for Always-on Biomedical Applications at the Edge
The novel aspect of this work is the adaptive thresholding feature of the ADM, which allows the circuit to modulate and minimize the rate of events produced with the amplitude and noise characteristics of the signal.
Spike-based local synaptic plasticity: A survey of computational models and neuromorphic circuits
To this end, in this survey, we provide a comprehensive overview of representative brain-inspired synaptic plasticity models and mixed-signal CMOS neuromorphic circuits within a unified framework.
Neuromorphic Visual Odometry with Resonator Networks
The VO network we propose generates and stores a working memory of the presented visual environment.
Neuromorphic implementation of ECG anomaly detection using delay chains
Real-time analysis and classification of bio-signals measured using wearable devices is computationally costly and requires dedicated low-power hardware.
Cortical-inspired placement and routing: minimizing the memory resources in multi-core neuromorphic processors
To minimize the use of memory resources in multi-core neuromorphic processors, we propose a network design approach inspired by biological neural networks.
Neuromorphic Visual Scene Understanding with Resonator Networks
Understanding a visual scene by inferring identities and poses of its individual objects is still and open problem.
ReckOn: A 28nm Sub-mm2 Task-Agnostic Spiking Recurrent Neural Network Processor Enabling On-Chip Learning over Second-Long Timescales
A robust real-world deployment of autonomous edge devices requires on-chip adaptation to user-, environment- and task-induced variability.
Organic log-domain integrator synapse
In particular, the circuit is fabricated using organic-based materials that are electrically active, offer flexibility and biocompatibility, as well as time constants (critical in learning neural codes and encoding spatiotemporal patterns) that are biologically plausible.
A hardware-software co-design approach to minimize the use of memory resources in multi-core neuromorphic processors
Both in electronics and biology, physical implementations of neural networks have severe energy and memory constraints.
Online Training of Spiking Recurrent Neural Networks with Phase-Change Memory Synapses
These challenges are further accentuated, if one resorts to using memristive devices for in-memory computing to resolve the von-Neumann bottleneck problem, at the expense of a substantial increase in variability in both the computation and the working memory of the spiking RNNs.
Bottom-up and top-down approaches for the design of neuromorphic processing systems: Tradeoffs and synergies between natural and artificial intelligence
In this paper, we provide a comprehensive overview of the field, highlighting the different levels of granularity at which this paradigm shift is realized and comparing design approaches that focus on replicating natural intelligence (bottom-up) versus those that aim at solving practical artificial intelligence applications (top-down).
Online Detection of Vibration Anomalies Using Balanced Spiking Neural Networks
Vibration patterns yield valuable information about the health state of a running machine, which is commonly exploited in predictive maintenance tasks for large industrial systems.
Introducing "Neuromorphic Computing and Engineering"
The standard nature of computing is currently being challenged by a range of problems that start to hinder technological progress.
Learning in Deep Neural Networks Using a Biologically Inspired Optimizer
Here, we propose a novel biologically inspired optimizer for artificial (ANNs) and spiking neural networks (SNNs) that incorporates key principles of synaptic integration observed in dendrites of cortical neurons: GRAPES (Group Responsibility for Adjusting the Propagation of Error Signals).
An error-propagation spiking neural network compatible with neuromorphic processors
Spiking neural networks have shown great promise for the design of low-power sensory-processing and edge-computing hardware platforms.
Instantaneous Stereo Depth Estimation of Real-World Stimuli with a Neuromorphic Stereo-Vision Setup
Our experiments show that this SNN architecture, composed of coincidence detectors and disparity sensitive neurons, is able to provide a coarse estimate of the input disparity instantaneously, thereby detecting the presence of a stimulus moving in depth in real-time.
Supervised training of spiking neural networks for robust deployment on mixed-signal neuromorphic processors
Our method provides robust deployment of pre-trained networks on mixed-signal neuromorphic hardware, without requiring per-device training or calibration.
A Spiking Neural Network (SNN) for detecting High Frequency Oscillations (HFOs) in the intraoperative ECoG
In intraoperative ECoG recordings, high frequency oscillations (HFOs) generated by epileptogenic tissue can be used to tailor the resection margin.
Implementing efficient balanced networks with mixed-signal spike-based learning circuits
Our proposed method paves the way towards a system-level implementation of tightly balanced networks on analog mixed-signal neuromorphic hardware.
An electronic neuromorphic system for real-time detection of High Frequency Oscillations (HFOs) in intracranial EEG
By providing "neuromorphic intelligence" to neural recording circuits the approach proposed will pave the way for the development of systems that can detect HFO areas directly in the operation room and improve the seizure outcome of epilepsy surgery.
Closed-loop spiking control on a neuromorphic processor implemented on the iCub
In this paper, we present a closed-loop motor controller implemented on mixed-signal analog-digital neuromorphic hardware using a spiking neural network.
Visual Pattern Recognition with on On-chip Learning: towards a Fully Neuromorphic Approach
We present a spiking neural network (SNN) for visual pattern recognition with on-chip learning on neuromorphichardware.
Hardware Implementation of Deep Network Accelerators Towards Healthcare and Biomedical Applications
The advent of dedicated Deep Learning (DL) accelerators and neuromorphic processors has brought on new opportunities for applying both Deep and Spiking Neural Network (SNN) algorithms to healthcare and biomedical applications at the edge.
Ultra-Low-Power FDSOI Neural Circuits for Extreme-Edge Neuromorphic Intelligence
Recent years have seen an increasing interest in the development of artificial intelligence circuits and systems for edge computing applications.
A recipe for creating ideal hybrid memristive-CMOS neuromorphic computing systems
Finally, we discuss in what cases such neuromorphic systems can complement conventional processing ones and highlight the importance of exploiting the physics of both the memristive devices and of the CMOS circuits interfaced to them.
Real-time ultra-low power ECG anomaly detection using an event-driven neuromorphic processor
In this work we propose a compact and sub-mW low power neural processing system that can be used to perform on-line and real-time preliminary diagnosis of pathological conditions, to raise warnings for the existence of possible pathological conditions, or to trigger an off-line data recording system for further analysis by a medical professional.
Parameter Optimization and Learning in a Spiking Neural Network for UAV Obstacle Avoidance targeting Neuromorphic Processors
The Lobula Giant Movement Detector (LGMD) is an identified neuron of the locust that detects looming objects and triggers the insect's escape responses.
High performance RNNs with spiking neurons
The increasing need for compact and low-power computing solutions for machine learning applications has triggered a renaissance in the study of energy-efficient neural network accelerators.
Mapping Spiking Neural Networks to Neuromorphic Hardware
SpiNePlacer then finds the best placement of local and global synapses on the hardware using a meta-heuristic-based approach to minimize energy consumption and spike latency.
Analog circuits for mixed-signal neuromorphic computing architectures in 28 nm FD-SOI technology
Developing mixed-signal analog-digital neuromorphic circuits in advanced scaled processes poses significant design challenges.
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Mapping high-performance RNNs to in-memory neuromorphic chips
The increasing need for compact and low-power computing solutions for machine learning applications has triggered significant interest in energy-efficient neuromorphic systems.
A Spiking Network for Inference of Relations Trained with Neuromorphic Backpropagation
Our architecture is the first spiking neural network architecture with on-chip learning capabilities, which is able to perform relational inference on complex visual stimuli.
The importance of space and time in neuromorphic cognitive agents
This efficiency and adaptivity gap is partially explained by the computing substrate of biological neural processing systems that is fundamentally different from the way today's computers are built.
Kernelized Synaptic Weight Matrices
In this paper we introduce a novel neural network architecture, in which weight matrices are re-parametrized in terms of low-dimensional vectors, interacting through kernel functions.
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Large-Scale Neuromorphic Spiking Array Processors: A quest to mimic the brain
Neuromorphic engineering (NE) encompasses a diverse range of approaches to information processing that are inspired by neurobiological systems, and this feature distinguishes neuromorphic systems from conventional computing systems.
ADaPTION: Toolbox and Benchmark for Training Convolutional Neural Networks with Reduced Numerical Precision Weights and Activation
Using the ADaPTION tools, we quantized several CNNs including VGG16 down to 16-bit weights and activations with only 0. 8% drop in Top-1 accuracy.
A scalable multi-core architecture with heterogeneous memory structures for Dynamic Neuromorphic Asynchronous Processors (DYNAPs)
However, managing the traffic of asynchronous events in large scale systems is a daunting task, both in terms of circuit complexity and memory requirements.
Differential Evolution and Bayesian Optimisation for Hyper-Parameter Selection in Mixed-Signal Neuromorphic Circuits Applied to UAV Obstacle Avoidance
We also investigate the use of Self-Adaptive Differential Evolution (SADE) which has been shown to ameliorate the difficulties of finding appropriate input parameters for DE.
Surround suppression explained by long-range recruitment of local competition, in a columnar V1 model
Although neurons in columns of visual cortex of adult carnivores and primates share similar orientation tuning preferences, responses of nearby neurons are surprisingly sparse and temporally uncorrelated, especially in response to complex visual scenes.
Deep counter networks for asynchronous event-based processing
Despite their advantages in terms of computational resources, latency, and power consumption, event-based implementations of neural networks have not been able to achieve the same performance figures as their equivalent state-of-the-art deep network models.
Precise neural network computation with imprecise analog devices
The operations used for neural network computation map favorably onto simple analog circuits, which outshine their digital counterparts in terms of compactness and efficiency.
Stochastic Interpretation of Quasi-periodic Event-based Systems
We show that stochastic artificial neurons can be realized on silicon chips by exploiting the quasi-periodic behavior of mismatched analog oscillators to approximate the neuron's stochastic activation function.
Spiking Analog VLSI Neuron Assemblies as Constraint Satisfaction Problem Solvers
Solving constraint satisfaction problems (CSPs) is a notoriously expensive computational task.
Memory and information processing in neuromorphic systems
We describe the advantages of the different approaches being pursued and present the challenges that need to be addressed for building artificial neural processing systems that can display the richness of behaviors seen in biological systems.
Rounding Methods for Neural Networks with Low Resolution Synaptic Weights
We further use these methods to investigate the performance of three common neural network algorithms under fixed memory size of the weight matrix with different weight resolutions.
Recurrent networks of coupled Winner-Take-All oscillators for solving constraint satisfaction problems
If there is no solution that satisfies all constraints, the network state changes in a pseudo-random manner and its trajectory approximates a sampling procedure that selects a variable assignment with a probability that increases with the fraction of constraints satisfied by this assignment.
