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Found 14 papers, 7 papers with code
NeuraLUT: Hiding Neural Network Density in Boolean Synthesizable Functions
In these works, the boundaries of the neurons coincide with the boundaries of the LUTs.
LQER: Low-Rank Quantization Error Reconstruction for LLMs
Post-training quantization of Large Language Models (LLMs) is challenging.
Revisiting Block-based Quantisation: What is Important for Sub-8-bit LLM Inference?
In this work, we explore the statistical and learning properties of the LLM layer and attribute the bottleneck of LLM quantisation to numerical scaling offsets.
PolyLUT: Learning Piecewise Polynomials for Ultra-Low Latency FPGA LUT-based Inference
We show that by using polynomial building blocks, we can achieve the same accuracy using considerably fewer layers of soft logic than by using linear functions, leading to significant latency and area improvements.
FPGA Resource-aware Structured Pruning for Real-Time Neural Networks
Neural networks achieve state-of-the-art performance in image classification, speech recognition, scientific analysis and many more application areas.
ATHEENA: A Toolflow for Hardware Early-Exit Network Automation
Additionally, the toolflow can achieve a throughput matching the same baseline with as low as $46\%$ of the resources the baseline requires.
Abstract Interpretation on E-Graphs
Recent e-graph applications have typically considered concrete semantics of expressions, where the notion of equivalence stems from concrete interpretation of expressions.
Logic Shrinkage: Learned FPGA Netlist Sparsity for Efficient Neural Network Inference
To address these issues, we propose logic shrinkage, a fine-grained netlist pruning methodology enabling K to be automatically learned for every LUT in a neural network targeted for FPGA inference.
Enabling Binary Neural Network Training on the Edge
The ever-growing computational demands of increasingly complex machine learning models frequently necessitate the use of powerful cloud-based infrastructure for their training.
Horizon-independent Preconditioner Design for Linear Predictive Control
To reduce the number of iterations required, we present a simple method for computing a horizon-independent preconditioning matrix for the Hessian of the condensed problem.
Optimization and Control Systems and Control Systems and Control
LUTNet: Learning FPGA Configurations for Highly Efficient Neural Network Inference
Research has shown that deep neural networks contain significant redundancy, and thus that high classification accuracy can be achieved even when weights and activations are quantized down to binary values.
Rethinking Arithmetic for Deep Neural Networks
In general, our results suggest that it is valuable to consider Boolean circuits as neural networks, leading to the question of which circuit topologies are promising.
LUTNet: Rethinking Inference in FPGA Soft Logic
Research has shown that deep neural networks contain significant redundancy, and that high classification accuracies can be achieved even when weights and activations are quantised down to binary values.
Deep Neural Network Approximation for Custom Hardware: Where We've Been, Where We're Going
Deep neural networks have proven to be particularly effective in visual and audio recognition tasks.
