no code implementations • 22 May 2023 • Omar Ghazal, Simranjeet Singh, Tousif Rahman, Shengqi Yu, Yujin Zheng, Domenico Balsamo, Sachin Patkar, Farhad Merchant, Fei Xia, Alex Yakovlev, Rishad Shafik
Non-volatile memory devices such as Resistive RAM (ReRAM) offer integrated switching and storage capabilities showing promising performance for ML applications.
no code implementations • 9 Aug 2022 • Elmira Moussavi, Dominik Sisejkovic, Animesh Singh, Daniyar Kizatov, Rainer Leupers, Sven Ingebrandt, Vivek Pachauri, Farhad Merchant
The ion-sensitive field-effect transistor (ISFET) is an emerging technology that has received much attention in numerous research areas, including biochemistry, medicine, and security applications.
no code implementations • 19 Jul 2021 • Dominik Sisejkovic, Farhad Merchant, Lennart M. Reimann, Rainer Leupers
Hereby, the presented work offers a starting point for the design and evaluation of future-generation logic locking in the era of machine learning.
no code implementations • 5 Jul 2021 • Dominik Sisejkovic, Lennart M. Reimann, Elmira Moussavi, Farhad Merchant, Rainer Leupers
In the past decade, a lot of progress has been made in the design and evaluation of logic locking; a premier technique to safeguard the integrity of integrated circuits throughout the electronics supply chain.
no code implementations • 14 Jan 2021 • Farhad Merchant, Dominik Sisejkovic, Lennart M. Reimann, Kirthihan Yasotharan, Thomas Grass, Rainer Leupers
With the growing demands of consumer electronic products, the computational requirements are increasing exponentially.
Hardware Architecture
no code implementations • 5 Jan 2021 • Ihsen Alouani, Anouar Ben Khalifa, Farhad Merchant, Rainer Leupers
Moreover, in 100% of the tested machine-learning applications, the accuracy of posit-implemented systems is higher than the classical floating-point-based ones.
Hardware Architecture
no code implementations • 20 Nov 2020 • Dominik Sisejkovic, Farhad Merchant, Lennart M. Reimann, Harshit Srivastava, Ahmed Hallawa, Rainer Leupers
The first approach is based on a simple feedforward fully connected neural network.
no code implementations • 24 Oct 2020 • Suresh Nambi, Salim Ullah, Aditya Lohana, Siva Satyendra Sahoo, Farhad Merchant, Akash Kumar
Towards this end, we propose a novel Posit to fixed-point converter for enabling high-performance and energy-efficient hardware implementations for ANNs with minimal drop in the output accuracy.
1 code implementation • 30 May 2020 • Riya Jain, Niraj Sharma, Farhad Merchant, Sachin Patkar, Rainer Leupers
To the best of our knowledge, this is the first-ever integration of quire with a RISC-V core.
Hardware Architecture