Search Results for author: Andrea Calimera

Found 11 papers, 4 papers with code

Efficient Deep Learning Models for Privacy-preserving People Counting on Low-resolution Infrared Arrays

no code implementations12 Apr 2023 Chen Xie, Francesco Daghero, Yukai Chen, Marco Castellano, Luca Gandolfi, Andrea Calimera, Enrico Macii, Massimo Poncino, Daniele Jahier Pagliari

Ultra-low-resolution Infrared (IR) array sensors offer a low-cost, energy-efficient, and privacy-preserving solution for people counting, with applications such as occupancy monitoring.

Privacy Preserving

Human Activity Recognition on Microcontrollers with Quantized and Adaptive Deep Neural Networks

no code implementations2 Sep 2022 Francesco Daghero, Alessio Burrello, Chen Xie, Marco Castellano, Luca Gandolfi, Andrea Calimera, Enrico Macii, Massimo Poncino, Daniele Jahier Pagliari

With experiments on four datasets, and targeting an ultra-low-power RISC-V MCU, we show that (i) We are able to obtain a rich set of Pareto-optimal CNNs for HAR, spanning more than 1 order of magnitude in terms of memory, latency and energy consumption; (ii) Thanks to adaptive inference, we can derive >20 runtime operating modes starting from a single CNN, differing by up to 10% in classification scores and by more than 3x in inference complexity, with a limited memory overhead; (iii) on three of the four benchmarks, we outperform all previous deep learning methods, reducing the memory occupation by more than 100x.

Human Activity Recognition Quantization

Adaptive Random Forests for Energy-Efficient Inference on Microcontrollers

no code implementations27 May 2022 Francesco Daghero, Alessio Burrello, Chen Xie, Luca Benini, Andrea Calimera, Enrico Macii, Massimo Poncino, Daniele Jahier Pagliari

The accuracy of a RF often increases with the number of internal weak learners (decision trees), but at the cost of a proportional increase in inference latency and energy consumption.

Ultra-compact Binary Neural Networks for Human Activity Recognition on RISC-V Processors

1 code implementation25 May 2022 Francesco Daghero, Chen Xie, Daniele Jahier Pagliari, Alessio Burrello, Marco Castellano, Luca Gandolfi, Andrea Calimera, Enrico Macii, Massimo Poncino

In this work, we propose a novel implementation of HAR based on deep neural networks, and precisely on Binary Neural Networks (BNNs), targeting low-power general purpose processors with a RISC-V instruction set.

Human Activity Recognition

Privacy-preserving Social Distance Monitoring on Microcontrollers with Low-Resolution Infrared Sensors and CNNs

no code implementations22 Apr 2022 Chen Xie, Francesco Daghero, Yukai Chen, Marco Castellano, Luca Gandolfi, Andrea Calimera, Enrico Macii, Massimo Poncino, Daniele Jahier Pagliari

In this work, we demonstrate that an accurate detection of social distance violations can be achieved processing the raw output of a 8x8 IR array sensor with a small-sized Convolutional Neural Network (CNN).

Privacy Preserving

Energy-efficient and Privacy-aware Social Distance Monitoring with Low-resolution Infrared Sensors and Adaptive Inference

no code implementations22 Apr 2022 Chen Xie, Daniele Jahier Pagliari, Andrea Calimera

Low-resolution infrared (IR) Sensors combined with machine learning (ML) can be leveraged to implement privacy-preserving social distance monitoring solutions in indoor spaces.

Privacy Preserving

Dynamic ConvNets on Tiny Devices via Nested Sparsity

no code implementations7 Mar 2022 Matteo Grimaldi, Luca Mocerino, Antonio Cipolletta, Andrea Calimera

This work introduces a new training and compression pipeline to build Nested Sparse ConvNets, a class of dynamic Convolutional Neural Networks (ConvNets) suited for inference tasks deployed on resource-constrained devices at the edge of the Internet-of-Things.

Image Classification object-detection +1

Adaptive Test-Time Augmentation for Low-Power CPU

no code implementations13 May 2021 Luca Mocerino, Roberto G. Rizzo, Valentino Peluso, Andrea Calimera, Enrico Macii

Convolutional Neural Networks (ConvNets) are trained offline using the few available data and may therefore suffer from substantial accuracy loss when ported on the field, where unseen input patterns received under unpredictable external conditions can mislead the model.

Image Classification

EAST: Encoding-Aware Sparse Training for Deep Memory Compression of ConvNets

1 code implementation20 Dec 2019 Matteo Grimaldi, Valentino Peluso, Andrea Calimera

The implementation of Deep Convolutional Neural Networks (ConvNets) on tiny end-nodes with limited non-volatile memory space calls for smart compression strategies capable of shrinking the footprint yet preserving predictive accuracy.

Quantization

TentacleNet: A Pseudo-Ensemble Template for Accurate Binary Convolutional Neural Networks

1 code implementation20 Dec 2019 Luca Mocerino, Andrea Calimera

Binarization is an attractive strategy for implementing lightweight Deep Convolutional Neural Networks (CNNs).

Binarization Ensemble Learning +1

CoopNet: Cooperative Convolutional Neural Network for Low-Power MCUs

1 code implementation19 Nov 2019 Luca Mocerino, Andrea Calimera

Fixed-point quantization and binarization are two reduction methods adopted to deploy Convolutional Neural Networks (CNN) on end-nodes powered by low-power micro-controller units (MCUs).

Binarization Quantization

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