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Found 4 papers, 0 papers with code
A 137.5 TOPS/W SRAM Compute-in-Memory Macro with 9-b Memory Cell-Embedded ADCs and Signal Margin Enhancement Techniques for AI Edge Applications
In this paper, we propose a high-precision SRAM-based CIM macro that can perform 4x4-bit MAC operations and yield 9-bit signed output.
Tight Compression: Compressing CNN Through Fine-Grained Pruning and Weight Permutation for Efficient Implementation
Through permutation, the optimal arrangement of the weight matrix is obtained, and the sparse weight matrix is further compressed to a small and dense format to make full use of the hardware resources.
Accelerating Large Kernel Convolutions with Nested Winograd Transformation.pdf
This work proposes a nested Winograd algorithm that iteratively decomposes a large kernel convolution into small kernel convolutions and proves it to be more effective than the linear decomposition Winograd transformation algorithm.
SparseNN: An Energy-Efficient Neural Network Accelerator Exploiting Input and Output Sparsity
Furthermore, an energy-efficient hardware architecture, SparseNN, is proposed to exploit both the input and output sparsity.
