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Found 16 papers, 0 papers with code
Non-Ideal Program-Time Conservation in Charge Trap Flash for Deep Learning
Training deep neural networks (DNNs) is computationally intensive but arrays of non-volatile memories like Charge Trap Flash (CTF) can accelerate DNN operations using in-memory computing.
Ferroelectric MirrorBit-Integrated Field-Programmable Memory Array for TCAM, Storage, and In-Memory Computing Applications
We show the conventional 1-Bit FeFET, the MirrorBit, and MirrorBit-based Ternary Content-addressable memory (MCAM or MirrorBit-based TCAM) within the same field-programmable array.
FeFET-based MirrorBit cell for High-density NVM storage
A TCAD simulation is also presented to explain the origin and working of MirrorBit states based on the FeFET model calibrated using the GlobalFoundries FeFET device.
A temporally and spatially local spike-based backpropagation algorithm to enable training in hardware
Although signed gradient values are a challenge for spike-based representation, we tackle this by splitting the gradient signal into positive and negative streams.
Algorithm For 3D-Chemotaxis Using Spiking Neural Network
In this work, we aim to devise an end-to-end spiking implementation for contour tracking in 3D media inspired by chemotaxis, where the worm reaches the region which has the given set concentration.
Spiking-GAN: A Spiking Generative Adversarial Network Using Time-To-First-Spike Coding
Thereby demonstrating the potential of this framework for solving such problems in the spiking domain.
Simplified Klinokinesis using Spiking Neural Networks for Resource-Constrained Navigation on the Neuromorphic Processor Loihi
C. elegans shows chemotaxis using klinokinesis where the worm senses the concentration based on a single concentration sensor to compute the concentration gradient to perform foraging through gradient ascent/descent towards the target concentration followed by contour tracking.
Hardware-Friendly Synaptic Orders and Timescales in Liquid State Machines for Speech Classification
In this work, we analyze the role of synaptic orders namely: {\delta} (high output for single time step), 0th (rectangular with a finite pulse width), 1st (exponential fall) and 2nd order (exponential rise and fall) and synaptic timescales on the reservoir output response and on the TI-46 spoken digits classification accuracy under a more comprehensive parameter sweep.
Adaptive Chemotaxis for improved Contour Tracking using Spiking Neural Networks
In particular, we focus on the problem of contour tracking, wherein the bot must reach and subsequently follow a desired concentration setpoint.
Software-Level Accuracy Using Stochastic Computing With Charge-Trap-Flash Based Weight Matrix
The in-memory computing paradigm with emerging memory devices has been recently shown to be a promising way to accelerate deep learning.
Band-to-Band Tunneling based Ultra-Energy Efficient Silicon Neuron
Neuromorphic engineering implements SNNs in hardware, aspiring to mimic the brain at scale (i. e., 100 billion neurons) with biological area and energy efficiency.
Predicting Performance using Approximate State Space Model for Liquid State Machines
Lyapunov exponent (mu), used to characterize the "non-linearity" of the network, correlates well with LSM performance.
A case for multiple and parallel RRAMs as synaptic model for training SNNs
As a solution, we propose the use of multiple PCMO-RRAMs in parallel within a synapse.
An On-chip Trainable and Clock-less Spiking Neural Network with 1R Memristive Synapses
This enables learning and recognition simultaneously on an SNN.
A Software-equivalent SNN Hardware using RRAM-array for Asynchronous Real-time Learning
Spiking Neural Network (SNN) naturally inspires hardware implementation as it is based on biology.
A simple and efficient SNN and its performance & robustness evaluation method to enable hardware implementation
Second, we develop a computationally efficient (15000 x) and accurate (correlation of 0. 98) method to evaluate the performance of the network without standard recognition tests.
