no code implementations • 7 Mar 2023 • Navid Hashemi, Bardh Hoxha, Tomoya Yamaguchi, Danil Prokhorov, Geogios Fainekos, Jyotirmoy Deshmukh
In this paper, we present a model for the verification of Neural Network (NN) controllers for general STL specifications using a custom neural architecture where we map an STL formula into a feed-forward neural network with ReLU activation.
no code implementations • 15 Feb 2023 • Tomoya Yamaguchi, Kohei Arai, Tomoaki Niiyama, Atsushi Uchida, Satoshi Sunada
This approach allows for compressive acquisitions of visual information with a single channel at gigahertz rates, outperforming conventional approaches, and enables its direct photonic processing using a photonic reservoir computer in a time domain.
no code implementations • 14 Oct 2022 • Navid Hashemi, Xin Qin, Jyotirmoy V. Deshmukh, Georgios Fainekos, Bardh Hoxha, Danil Prokhorov, Tomoya Yamaguchi
In this paper, we consider the problem of synthesizing a controller in the presence of uncertainty such that the resulting closed-loop system satisfies certain hard constraints while optimizing certain (soft) performance objectives.
no code implementations • 30 Dec 2021 • Shakiba Yaghoubi, Georgios Fainekos, Tomoya Yamaguchi, Danil Prokhorov, Bardh Hoxha
Our goal is to design controllers that bound the probability of a system failure in finite-time to a given desired value.
no code implementations • 22 Jun 2021 • Xiaodong Yang, Tomoya Yamaguchi, Hoang-Dung Tran, Bardh Hoxha, Taylor T Johnson, Danil Prokhorov
Besides the computation of reachable sets, our approach is also capable of backtracking to the input domain given an output reachable set.