no code implementations • 5 Mar 2023 • Adam N. McCaughan, Bakhrom G. Oripov, Natesh Ganesh, Sae Woo Nam, Andrew Dienstfrey, Sonia M. Buckley
We present multiplexed gradient descent (MGD), a gradient descent framework designed to easily train analog or digital neural networks in hardware.
no code implementations • 20 Apr 2022 • Saeed Khan, Bryce A. Primavera, Jeff Chiles, Adam N. McCaughan, Sonia M. Buckley, Alexander N. Tait, Adriana Lita, John Biesecker, Anna Fox, David Olaya, Richard P. Mirin, Sae Woo Nam, Jeffrey M. Shainline
Superconducting optoelectronic hardware is being explored as a path towards artificial spiking neural networks with unprecedented scales of complexity and computational ability.
no code implementations • 7 May 2018 • Jeffrey M. Shainline, Sonia M. Buckley, Adam N. McCaughan, Manuel Castellanos-Beltran, Christine A. Donnelly, Michael L. Schneider, Richard P. Mirin, Sae Woo Nam
The current from many synaptic connections is inductively coupled to a superconducting loop that implements the neuronal threshold operation.
no code implementations • 4 May 2018 • Jeffrey M. Shainline, Adam N. McCaughan, Sonia M. Buckley, Christine A. Donnelly, Manuel Castellanos-Beltran, Michael L. Schneider, Richard P. Mirin, Sae Woo Nam
As a means of dynamically reconfiguring the synaptic weight of a superconducting optoelectronic loop neuron, a superconducting flux storage loop is inductively coupled to the synaptic current bias of the neuron.
no code implementations • 4 May 2018 • Jeffrey M. Shainline, Adam N. McCaughan, Sonia M. Buckley, Richard P. Mirin, Sae Woo Nam
A superconducting optoelectronic neuron will produce a small current pulse upon reaching threshold.
no code implementations • 4 May 2018 • Jeffrey M. Shainline, Sonia M. Buckley, Adam N. McCaughan, Jeff Chiles, Richard P. Mirin, Sae Woo Nam
Superconducting detectors enable signaling with single photons for maximal energy efficiency.
no code implementations • 4 May 2018 • Jeffrey M. Shainline, Jeff Chiles, Sonia M. Buckley, Adam N. McCaughan, Richard P. Mirin, Sae Woo Nam
By modeling the physical size of superconducting optoelectronic neurons, we calculate the area of these networks.
no code implementations • 4 May 2018 • Jeffrey M. Shainline, Sonia M. Buckley, Adam N. McCaughan, Jeff Chiles, Richard P. Mirin, Sae Woo Nam
The design of neural hardware is informed by the prominence of differentiated processing and information integration in cognitive systems.
no code implementations • 30 Sep 2016 • Jeffrey M. Shainline, Sonia M. Buckley, Richard P. Mirin, Sae Woo Nam
To explore the limits of information processing, it will be necessary to implement new hardware platforms with large numbers of neurons, each with a large number of connections to other neurons.