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Found 2 papers, 2 papers with code
Towards Faster Reasoners By Using Transparent Huge Pages
Huge pages allow to reduce the overhead that is required to translate memory addresses between the virtual memory of the operating system and the physical memory of the hardware.
LazyFP: Leaking FPU Register State using Microarchitectural Side-Channels
As an optimization, the operating system can defer the context switch of the FPU and SIMD register set until the first instruction is executed that needs access to these registers.
Operating Systems Hardware Architecture Cryptography and Security
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