Extracting Success from IBM's 20-Qubit Machines Using Error-Aware Compilation

1 code implementation • 26 Mar 2019 • Shin Nishio, Yulu Pan, Takahiko Satoh, Hideharu Amano, Rodney Van Meter

For a circuit within the capabilities of the hardware, our compilation increases estimated success probability and reduces KL-divergence relative to an error-oblivious placement.