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Energy Efficient Hardware Acceleration of Neural Networks with Power-of-Two Quantisation
Deep neural networks virtually dominate the domain of most modern vision systems, providing high performance at a cost of increased computational complexity. Since for those systems it is often required to operate both in real-time and with minimal energy consumption (e. g., for wearable devices or autonomous vehicles, edge Internet of Things (IoT), sensor networks), various network optimisation techniques are used, e. g., quantisation, pruning, or dedicated lightweight architectures.
Towards real-time and energy efficient Siamese tracking -- a hardware-software approach
To overcome this, one can use energy-efficient embedded devices, such as heterogeneous platforms joining the ARM processor system with programmable logic (FPGA).
Power-of-Two Quantization for Low Bitwidth and Hardware Compliant Neural Networks
Eventually, the experiments showed that for low bit width precision, non-uniform quantization performs better than uniform, and at the same time, PoT quantization vastly reduces the computational complexity of the neural network.
Exploration of Hardware Acceleration Methods for an XNOR Traffic Signs Classifier
Deep learning algorithms are a key component of many state-of-the-art vision systems, especially as Convolutional Neural Networks (CNN) outperform most solutions in the sense of accuracy.
