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Algorithm and Hardware Co-Design of Energy-Efficient LSTM Networks for Video Recognition with Hierarchical Tucker Tensor Decomposition
Meanwhile, compared with the state-of-the-art tensor decomposed model-oriented hardware TIE, our proposed FDHT-LSTM architecture achieves better performance in throughput, area efficiency and energy efficiency, respectively on LSTM-Youtube workload.
Doubly Residual Neural Decoder: Towards Low-Complexity High-Performance Channel Decoding
Recently deep neural networks have been successfully applied in channel coding to improve the decoding performance.
PERMDNN: Efficient Compressed DNN Architecture with Permuted Diagonal Matrices
On the other hand, the recent structured matrix-based approach (i. e., CirCNN) is limited by the relatively complex arithmetic computation (i. e., FFT), less flexible compression ratio, and its inability to fully utilize input sparsity.
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