Search Results for author:
Found 76 papers, 14 papers with code
Weakly Supervised Change Detection via Knowledge Distillation and Multiscale Sigmoid Inference
Moreover, we designed a Multiscale Sigmoid Inference (MSI) module as a post processing step to further refine the change probability map from the trained student network.
Key Information Retrieval to Classify the Unstructured Data Content of Preferential Trade Agreements
To address this issue, we introduce a novel approach to long-text classification and prediction.
Zero-Space Cost Fault Tolerance for Transformer-based Language Models on ReRAM
Resistive Random Access Memory (ReRAM) has emerged as a promising platform for deep neural networks (DNNs) due to its support for parallel in-situ matrix-vector multiplication.
FlashVideo: A Framework for Swift Inference in Text-to-Video Generation
In the evolving field of machine learning, video generation has witnessed significant advancements with autoregressive-based transformer models and diffusion models, known for synthesizing dynamic and realistic scenes.
MaxK-GNN: Extremely Fast GPU Kernel Design for Accelerating Graph Neural Networks Training
In this paper, we present MaxK-GNN, an advanced high-performance GPU training system integrating algorithm and system innovation.
Advanced Large Language Model (LLM)-Driven Verilog Development: Enhancing Power, Performance, and Area Optimization in Code Synthesis
The increasing use of Advanced Language Models (ALMs) in diverse sectors, particularly due to their impressive capability to generate top-tier content following linguistic instructions, forms the core of this investigation.
Evaluating Emerging AI/ML Accelerators: IPU, RDU, and NVIDIA/AMD GPUs
The relentless advancement of artificial intelligence (AI) and machine learning (ML) applications necessitates the development of specialized hardware accelerators capable of handling the increasing complexity and computational demands.
DeeDiff: Dynamic Uncertainty-Aware Early Exiting for Accelerating Diffusion Model Generation
In this work, we propose DeeDiff, an early exiting framework that adaptively allocates computation resources in each sampling step to improve the generation efficiency of diffusion models.
Accel-GCN: High-Performance GPU Accelerator Design for Graph Convolution Networks
Utilizing these principles, we formulated a kernel for sparse matrix multiplication (SpMM) in GCNs that employs block-level partitioning and combined warp strategy.
AutoReP: Automatic ReLU Replacement for Fast Private Network Inference
The growth of the Machine-Learning-As-A-Service (MLaaS) market has highlighted clients' data privacy and security issues.
Boosting Logical Reasoning in Large Language Models through a New Framework: The Graph of Thought
Recent advancements in large-scale models, such as GPT-4, have showcased remarkable capabilities in addressing standard queries.
Towards Zero Memory Footprint Spiking Neural Network Training
Our design is able to achieve a $\mathbf{58. 65\times}$ reduction in memory usage compared to the current SNN node.
Tango: rethinking quantization for graph neural network training on GPUs
Graph Neural Networks (GNNs) are becoming increasingly popular due to their superior performance in critical graph-related tasks.
Spectral-DP: Differentially Private Deep Learning through Spectral Perturbation and Filtering
In particular, for fully connected layers, we combine a block-circulant based spatial restructuring with Spectral-DP to achieve better utility.
Creating a Dataset for High-Performance Computing Code Translation using LLMs: A Bridge Between OpenMP Fortran and C++
In this study, we present a novel dataset for training machine learning models translating between OpenMP Fortran and C++ code.
Multi-Task Models Adversarial Attacks
We then introduce a novel attack framework, the Gradient Balancing Multi-Task Attack (GB-MTA), which treats attacking a multi-task model as an optimization problem.
Neurogenesis Dynamics-inspired Spiking Neural Network Training Acceleration
Experimental results show that NDSNN achieves up to 20. 52\% improvement in accuracy on Tiny-ImageNet using ResNet-19 (with a sparsity of 99\%) as compared to other SOTA methods (e. g., Lottery Ticket Hypothesis (LTH), SET-SNN, RigL-SNN).
Surrogate Lagrangian Relaxation: A Path To Retrain-free Deep Neural Network Pruning
We evaluate our method on image classification tasks using CIFAR-10 and ImageNet with state-of-the-art MLP-Mixer, Swin Transformer, and VGG-16, ResNet-18, ResNet-50 and ResNet-110, MobileNetV2.
Physics-aware Roughness Optimization for Diffractive Optical Neural Networks
As a representative next-generation device/circuit technology beyond CMOS, diffractive optical neural networks (DONNs) have shown promising advantages over conventional deep neural networks due to extreme fast computation speed (light speed) and low energy consumption.
Collaborative Multi-Object Tracking with Conformal Uncertainty Propagation
MOT-CUP demonstrates the importance of uncertainty quantification in both COD and MOT, and provides the first attempt to improve the accuracy and reduce the uncertainty in MOT based on COD through uncertainty propagation.
Shared Information-Based Safe And Efficient Behavior Planning For Connected Autonomous Vehicles
The recent advancements in wireless technology enable connected autonomous vehicles (CAVs) to gather data via vehicle-to-vehicle (V2V) communication, such as processed LIDAR and camera data from other vehicles.
RRNet: Towards ReLU-Reduced Neural Network for Two-party Computation Based Private Inference
The proliferation of deep learning (DL) has led to the emergence of privacy and security concerns.
Accelerating Dataset Distillation via Model Augmentation
Dataset Distillation (DD), a newly emerging field, aims at generating much smaller but efficient synthetic training datasets from large ones.
All-in-One: A Highly Representative DNN Pruning Framework for Edge Devices with Dynamic Power Management
By re-configuring the model to the corresponding pruning ratio for a specific execution frequency (and voltage), we are able to achieve stable inference speed, i. e., keeping the difference in speed performance under various execution frequencies as small as possible.
Dynamic Sparse Training via Balancing the Exploration-Exploitation Trade-off
We further design an acquisition function and provide the theoretical guarantees for the proposed method and clarify its convergence property.
Game Theoretic Mixed Experts for Combinational Adversarial Machine Learning
First, how can the low transferability between defenses be utilized in a game theoretic framework to improve the robustness?
You Need Multiple Exiting: Dynamic Early Exiting for Accelerating Unified Vision Language Model
To handle this challenge, we propose a novel early exiting strategy for unified visual language models, which allows dynamically skip the layers in encoder and decoder simultaneously in term of input layer-wise similarities with multiple times of early exiting, namely \textbf{MuE}.
Efficient Traffic State Forecasting using Spatio-Temporal Network Dependencies: A Sparse Graph Neural Network Approach
We consider the problem of long-term traffic speed forecasting for a real large-scale transportation network data from the California Department of Transportation (Caltrans) Performance Measurement System (PeMS).
Towards Real-Time Temporal Graph Learning
Prior work operates on pre-collected temporal graph data and is not designed to handle updates on a graph in real-time.
PolyMPCNet: Towards ReLU-free Neural Architecture Search in Two-party Computation Based Private Inference
The rapid growth and deployment of deep learning (DL) has witnessed emerging privacy and security concerns.
Uncertainty Quantification of Collaborative Detection for Self-Driving
Our work is the first to estimate the uncertainty of collaborative object detection.
Towards Sparsification of Graph Neural Networks
In this paper, we utilize two state-of-the-art model compression methods (1) train and prune and (2) sparse training for the sparsification of weight layers in GNNs.
Attacking the Spike: On the Transferability and Security of Spiking Neural Networks to Adversarial Examples
First, we show that successful white-box adversarial attacks on SNNs are highly dependent on the underlying surrogate gradient technique, even in the case of adversarially trained SNNs.
A Length Adaptive Algorithm-Hardware Co-design of Transformer on FPGA Through Sparse Attention and Dynamic Pipelining
Particularly, we develop a hardware-friendly sparse attention operator and a length-aware hardware resource scheduling algorithm.
EVE: Environmental Adaptive Neural Network Models for Low-power Energy Harvesting System
Energy harvesting (EH) technology that harvests energy from ambient environment is a promising alternative to batteries for powering those devices due to the low maintenance cost and wide availability of the energy sources.
An Automatic and Efficient BERT Pruning for Edge AI Systems
On MRPC, we obtain a 4. 6 higher score than the SOTA at the same overall pruning ratio of 0. 5.
A Secure and Efficient Federated Learning Framework for NLP
In this work, we consider the problem of designing secure and efficient federated learning (FL) frameworks.
Enabling Fast Deep Learning on Tiny Energy-Harvesting IoT Devices
Energy harvesting (EH) IoT devices that operate intermittently without batteries, coupled with advances in deep neural networks (DNNs), have opened up new opportunities for enabling sustainable smart applications.
Detecting Gender Bias in Transformer-based Models: A Case Study on BERT
In this paper, we propose a novel gender bias detection method by utilizing attention map for transformer-based models.
Sparse Progressive Distillation: Resolving Overfitting under Pretrain-and-Finetune Paradigm
Conventional wisdom in pruning Transformer-based language models is that pruning reduces the model expressiveness and thus is more likely to underfit rather than overfit.
Dr. Top-k: Delegate-Centric Top-k on GPUs
Recent top-$k$ computation efforts explore the possibility of revising various sorting algorithms to answer top-$k$ queries on GPUs.
Exploration of Quantum Neural Architecture by Mixing Quantum Neuron Designs
Experimental results demonstrate that the identified quantum neural architectures with mixed quantum neurons can achieve 90. 62% of accuracy on the MNIST dataset, compared with 52. 77% and 69. 92% on the VQC and QuantumFlow, respectively.
Binary Complex Neural Network Acceleration on FPGA
Deep complex networks (DCN), in contrast, can learn from complex data, but have high computational costs; therefore, they cannot satisfy the instant decision-making requirements of many deployable systems dealing with short observations or short signal bursts.
FORMS: Fine-grained Polarized ReRAM-based In-situ Computation for Mixed-signal DNN Accelerator
With weights stored in the ReRAM crossbar cells as conductance, when the input vector is applied to word lines, the matrix-vector multiplication results can be generated as the current in bit lines.
A Compression-Compilation Framework for On-mobile Real-time BERT Applications
In this paper, we propose a compression-compilation co-design framework that can guarantee the identified model to meet both resource and real-time specifications of mobile devices.
TAG: Gradient Attack on Transformer-based Language Models
In this paper, as the first attempt, we formulate the gradient attack problem on the Transformer-based language models and propose a gradient attack algorithm, TAG, to reconstruct the local training data.
Federated Learning
Cryptography and Security
Dancing along Battery: Enabling Transformer with Run-time Reconfigurability on Mobile Devices
Specifically, RT3 integrates two-level optimizations: First, it utilizes an efficient BP as the first-step compression for resource-constrained mobile devices; then, RT3 heuristically generates a shrunken search space based on the first level optimization and searches multiple pattern sets with diverse sparsity for PP via reinforcement learning to support lightweight software reconfiguration, which corresponds to available frequency levels of DVFS (i. e., hardware reconfiguration).
Enabling Retrain-free Deep Neural Network Pruning using Surrogate Lagrangian Relaxation
We further accelerate the convergence of the SLR by using quadratic penalties.
Efficient Transformer-based Large Scale Language Representations using Hardware-friendly Block Structured Pruning
Pre-trained large-scale language models have increasingly demonstrated high accuracy on many natural language processing (NLP) tasks.
Real-Time Execution of Large-scale Language Models on Mobile
Our framework can guarantee the identified model to meet both resource and real-time specifications of mobile devices, thus achieving real-time execution of large transformer-based models like BERT variants.
SAPAG: A Self-Adaptive Privacy Attack From Gradients
Distributed learning such as federated learning or collaborative learning enables model training on decentralized data from users and only collects local gradients, where data is processed close to its sources for data privacy.
ESMFL: Efficient and Secure Models for Federated Learning
Nowadays, Deep Neural Networks are widely applied to various domains.
Against Membership Inference Attack: Pruning is All You Need
The large model size, high computational operations, and vulnerability against membership inference attack (MIA) have impeded deep learning or deep neural networks (DNNs) popularity, especially on mobile devices.
FTRANS: Energy-Efficient Acceleration of Transformers using FPGA
In natural language processing (NLP), the "Transformer" architecture was proposed as the first transduction model replying entirely on self-attention mechanisms without using sequence-aligned recurrent neural networks (RNNs) or convolution, and it achieved significant improvements for sequence to sequence tasks.
A Unified DNN Weight Compression Framework Using Reweighted Optimization Methods
To address the large model size and intensive computation requirement of deep neural networks (DNNs), weight pruning techniques have been proposed and generally fall into two categories, i. e., static regularization-based pruning and dynamic regularization-based pruning.
A Privacy-Preserving-Oriented DNN Pruning and Mobile Acceleration Framework
Weight pruning of deep neural networks (DNNs) has been proposed to satisfy the limited storage and computing capability of mobile edge devices.
A Multi-Agent Reinforcement Learning Approach For Safe and Efficient Behavior Planning Of Connected Autonomous Vehicles
The truncated Q-function utilizes the shared information from neighboring CAVs such that the joint state and action spaces of the Q-function do not grow in our algorithm for a large-scale CAV system.
Towards an Efficient and General Framework of Robust Training for Graph Neural Networks
To overcome these limitations, we propose a general framework which leverages the greedy search algorithms and zeroth-order methods to obtain robust GNNs in a generic and an efficient manner.
A SOT-MRAM-based Processing-In-Memory Engine for Highly Compressed DNN Implementation
Thus, the footprint and power consumption of SOT-MRAM PIM can be reduced, while increasing the overall system throughput at the meantime, making our proposed ADMM-based SOT-MRAM PIM more energy efficiency and suitable for embedded systems or IoT devices.
Deep Compressed Pneumonia Detection for Low-Power Embedded Devices
Deep neural networks (DNNs) have been expanded into medical fields and triggered the revolution of some medical applications by extracting complex features and achieving high accuracy and performance, etc.
REQ-YOLO: A Resource-Aware, Efficient Quantization Framework for Object Detection on FPGAs
To achieve real-time, highly-efficient implementations on FPGA, we present the detailed hardware implementation of block circulant matrices on CONV layers and develop an efficient processing element (PE) structure supporting the heterogeneous weight quantization, CONV dataflow and pipelining techniques, design optimization, and a template-based automatic synthesis framework to optimally exploit hardware resource.
An Ultra-Efficient Memristor-Based DNN Framework with Structured Weight Pruning and Quantization Using ADMM
Memristor-based weight pruning and weight quantization have been seperately investigated and proven effectiveness in reducing area and power consumption compared to the original DNN model.
Tiny but Accurate: A Pruned, Quantized and Optimized Memristor Crossbar Framework for Ultra Efficient DNN Implementation
To mitigate the challenges, the memristor crossbar array has emerged as an intrinsically suitable matrix computation and low-power acceleration framework for DNN applications.
A Stochastic-Computing based Deep Learning Framework using Adiabatic Quantum-Flux-Parametron SuperconductingTechnology
Further, the application of SC has been investigated in DNNs in prior work, and the suitability has been illustrated as SC is more compatible with approximate computations.
E-RNN: Design Optimization for Efficient Recurrent Neural Networks in FPGAs
It is a challenging task to have real-time, efficient, and accurate hardware RNN implementations because of the high sensitivity to imprecision accumulation and the requirement of special activation function implementations.
Automatic Speech Recognition
Automatic Speech Recognition (ASR)
+3
Towards Budget-Driven Hardware Optimization for Deep Convolutional Neural Networks using Stochastic Computing
Recently, Deep Convolutional Neural Network (DCNN) has achieved tremendous success in many machine learning applications.
Learning Topics using Semantic Locality
The topic modeling discovers the latent topic probability of the given text documents.
Structured Weight Matrices-Based Hardware Accelerators in Deep Neural Networks: FPGAs and ASICs
For FPGA implementations on deep convolutional neural networks (DCNNs), we achieve at least 152X and 72X improvement in performance and energy efficiency, respectively using the SWM-based framework, compared with the baseline of IBM TrueNorth processor under same accuracy constraints using the data set of MNIST, SVHN, and CIFAR-10.
Efficient Recurrent Neural Networks using Structured Matrices in FPGAs
Recurrent Neural Networks (RNNs) are becoming increasingly important for time series-related applications which require efficient and real-time implementations.
C-LSTM: Enabling Efficient LSTM using Structured Compression Techniques on FPGAs
The previous work proposes to use a pruning based compression technique to reduce the model size and thus speedups the inference on FPGAs.
Towards Ultra-High Performance and Energy Efficiency of Deep Learning Systems: An Algorithm-Hardware Co-Optimization Framework
Hardware accelerations of deep learning systems have been extensively investigated in industry and academia.
VIBNN: Hardware Acceleration of Bayesian Neural Networks
In this paper, we propose VIBNN, an FPGA-based hardware accelerator design for variational inference on BNNs.
FFT-Based Deep Learning Deployment in Embedded Systems
The large model size of DNNs, while providing excellent accuracy, also burdens the embedded platforms with intensive computation and storage.
CirCNN: Accelerating and Compressing Deep Neural Networks Using Block-CirculantWeight Matrices
As the size of DNNs continues to grow, it is critical to improve the energy efficiency and performance while maintaining accuracy.
Hardware-Driven Nonlinear Activation for Stochastic Computing Based Deep Convolutional Neural Networks
Recently, Deep Convolutional Neural Networks (DCNNs) have made unprecedented progress, achieving the accuracy close to, or even better than human-level perception in various tasks.
SC-DCNN: Highly-Scalable Deep Convolutional Neural Network using Stochastic Computing
Stochastic Computing (SC), which uses bit-stream to represent a number within [-1, 1] by counting the number of ones in the bit-stream, has a high potential for implementing DCNNs with high scalability and ultra-low hardware footprint.
